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AT91SAM7L-STK Rev. A Starter Kit
....................................................................................................................
User Guide
6409A-ATARM-30-Jun-08
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6409A-ATARM-30-Jun-08
AT91SAM7L-STK Rev. A Starter Kit User Guide
Table of Contents Section 1 Overview .................................................................................................................... 1-1
1.1 1.2 1.3 Scope................................................................................................................................. 1-1 Deliverables ...................................................................................................................... 1-1 The AT91SAM7L-STK Rev. A Starter Board ..................................................................... 1-1
Section 2 Setting Up the AT91SAM7L-STK Rev. A Board......................................................... 2-1
2.1 2.2 2.3 2.4 2.5 2.6 Electrostatic Warning ......................................................................................................... 2-1 Requirements..................................................................................................................... 2-1 Layout ................................................................................................................................ 2-2 Powering Up the Board...................................................................................................... 2-2 Getting Started................................................................................................................... 2-2 AT91SAM7L-STK Rev. A Block Diagram .......................................................................... 2-3
Section 3 Board Description....................................................................................................... 3-1
3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 AT91SAM7L64/128 Microcontroller ................................................................................... 3-1 AT91SAM7L64/128 Block Diagram ................................................................................... 3-3 Memory .............................................................................................................................. 3-4 Clock Circuitry.................................................................................................................... 3-4 Reset Circuitry ................................................................................................................... 3-4 Shut Down controller.......................................................................................................... 3-4 Power Supply Circuitry....................................................................................................... 3-4 User Interface .................................................................................................................... 3-4 Debug Interface ................................................................................................................. 3-4
3.10 Expansion Slot ................................................................................................................... 3-4 3.11 PIO Usage ......................................................................................................................... 3-5
Section 4 Configuration .............................................................................................................. 4-1
4.1 Configuration Straps .......................................................................................................... 4-1
Section 5 Schematics................................................................................................................. 5-1 Section 6 Errata.......................................................................................................................... 6-1
AT91SAM7L-STK Rev. A Starter Kit User Guide
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6409A-ATARM-30-Jun-08
Table of Contents (Continued)
6.1 6.2
Q1 Footprint Incorrect ........................................................................................................ 6-1 MAX3318 Control Pull-ups................................................................................................. 6-2
Section 7 Revision History ......................................................................................................... 7-1
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6409A-ATARM-30-Jun-08
AT91SAM7L-STK Rev. A Starter Kit User Guide
Section 1 Overview
1.1 Scope
The AT91SAM7L-STK rev.A starter kit enables evaluation capabilities and code development of applications running on an AT91SAM7L64/128. This guide focuses on the AT91SAM7L-STK rev.A board as an evaluation platform.
1.2
Deliverables
The AT91SAM7L-STK rev.A package contains the following items: An AT91SAM7L-STK rev.A board Two AAA batteries
1.3
The AT91SAM7L-STK Rev. A Starter Board
The board is equipped with an AT91SAM7L128 (128-lead LQFP package) together with the following: One DBGU serial communication port One ZIGBEE extension connector One JTAG/ICE debug interface Five user- input push buttons One WakeUP input push button One Reset Push Button One Battery Socket for two AAA batteries One 400 segments dot matrix LCD
AT91SAM7L-STK Rev. A Starter Kit User Guide
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6409A-ATARM-30-Jun-08
Section 2
Setting Up the AT91SAM7L-STK Rev. A Board
2.1 Electrostatic Warning
The AT91SAM7L-STK rev.A starter board is shipped in a protective anti-static package. The board must not be subjected to high electrostatic potentials. A grounding strap or similar protective device should be worn when handling the board. Avoid touching the component pins or any other metallic element.
2.2
Requirements
In order to set up the AT91SAM7L-STK rev.A starter board, the following items are needed: The AT91SAM7L-STK rev.A starter board Two AAA batteries
AT91SAM7L-STK Rev. A Starter Kit User Guide
2-1
6409A-ATARM-30-Jun-08
Setting Up the AT91SAM7L-STK Rev. A Board
2.3
Layout
AT91SAM7L-STK Rev. A Board Layout
Figure 2-1.
2.4
Powering Up the Board
The AT91SAM7L-STK rev.A requires 3.0V (2.2V-3.6V) DC input. The power is supplied to the board via 2 AAA batteries or 3.0V VCC pads.
2.5
Getting Started
Please refer to the AT91SAM product pages on the Atmel web site, for the most up-to-date information on getting started with the AT91SAM7L-STK rev.A.
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6409A-ATARM-30-Jun-08
AT91SAM7L-STK Rev. A Starter Kit User Guide
Setting Up the AT91SAM7L-STK Rev. A Board
2.6
AT91SAM7L-STK Rev. A Block Diagram
AT91SAM7L-STK Block Diagram
SHEET 2
Figure 2-2.
Interfaces
'%*8
PC[0..29]
PC[0..29]
Interfaces Processor AD[0..3] PA[0..25] PB[0..23] PC[0..29]
SHEET 4
AD[0..3] PA[0..25] PB[0..23] PC[0..29] ERASE
Processor
LCD, KBD AD[0..3]
SHEET 3
AD[0..3]
PA[0..25] PB[0..23] PC[0..29]
PA[0..25] PB[0..23] PC[0..29]
ERASE
LCD, KBD
AT91SAM7L-STK Rev. A Starter Kit User Guide
=,*%((
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6409A-ATARM-30-Jun-08
Section 3 Board Description
3.1 AT91SAM7L64/128 Microcontroller
* Incorporates the ARM7TDMI(R) ARM(R) Thumb(R) Processor
- High-performance 32-bit RISC Architecture - High-density 16-bit Instruction Set - Leader in MIPS/Watt - EmbeddedICETM In-circuit Emulation, Debug Communication Channel Support Internal High-speed Flash - 128 Kbytes (AT91SAM7L128), Organized in 512 Pages of 256 Bytes Single Plane - 64 Kbytes (AT91SAM7L64), Organized In 256 Pages of 256 Bytes Single Plane - Single Cycle Access at Up to 15 MHz in Worst Case Conditions - 128-bit Read Access - Page Programming Time: 4.6 ms, Including Page Auto Erase, Full Erase Time: 10 ms - 10,000 Write Cycles, 10-year Data Retention Capability, Sector Lock Capabilities, Flash Security Bit - Fast Flash Programming Interface for High Volume Production Enhanced Embedded Flash Controller (EEFC) - Interface of the Flash Block with the 32-bit Internal Bus - Increases Performance in ARM and Thumb Mode with 128-bit Wide Memory Interface Internal High-speed SRAM, Single-cycle Access at Maximum Speed - 6 kbytes * 2 Kbytes Directly on Main Supply that Can Be Used as Backup SRAM * 4 Kbytes in the Core Memory Controller (MC) - Enhanced Embedded Flash Controller, Abort Status and Misalignment Detection Reset Controller (RSTC) - Based on Brownout Reset and Low-power Factory-calibrated Brownout Detector - Provides External Reset Signal Shaping and Reset Source Status Clock Generator (CKGR) - Low-power 32 kHz RC Oscillator, 32 kHz On-chip Oscillator, 2 MHz Fast RC Oscillator and one PLL Supply Controller (SUPC) - Minimizes Device Power Consumption - Manages the Different Supplies On Chip - Supports Multiple Wake-up Sources Power Management Controller (PMC) - Software Power Optimization Capabilities, Including Slow Clock Mode (Down to 500 Hz) and Idle Mode - Three Programmable External Clock Signals - Handles Fast Start Up Advanced Interrupt Controller (AIC) - Individually Maskable, Eight-level Priority, Vectored Interrupt Sources - Two External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt Protected
*
*
*
* *
* *
*
*
AT91SAM7L-STK Rev. A Starter Kit User Guide
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6409A-ATARM-30-Jun-08
Board Description * Debug Unit (DBGU)
- Two-wire UART and Support for Debug Communication Channel interrupt, Programmable ICE Access Prevention Periodic Interval Timer (PIT) - 20-bit Programmable Counter plus 12-bit Interval Counter Windowed Watchdog (WDT) - 12-bit Key-protected Programmable Counter - Provides Reset or Interrupt Signals to the System - Counter may be Stopped While the Processor is in Debug State or in Idle Mode Real-time Clock (RTC) - Two Hundred Year Calendar with Alarm - Runs Off the Internal RC or Crystal Oscillator Three Parallel Input/Output Controllers (PIOA, PIOB, PIOC) - Eighty Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os - Input Change Interrupt Capability on Each I/O Line - Individually Programmable Open-drain, Pull-up resistor and Synchronous Output Eleven Peripheral DMA Controller (PDC) Channels One Segmented LCD Controller - Display Capacity of Forty Segments and Ten Common Terminals - Software Selectable LCD Output Voltage (Contrast) Two Universal Synchronous/Asynchronous Receiver Transmitters (USART) - Individual Baud Rate Generator, IrDA(R) Infrared Modulation/Demodulation - Support for ISO7816 T0/T1 Smart Card, Hardware Handshaking, RS485 Support - Manchester Encoder/Decoder - Full Modem Line Support on USART1 One Master/Slave Serial Peripheral Interface (SPI) - 8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects One Three-channel 16-bit Timer/Counter (TC) - Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel - Double PWM Generation, Capture/Waveform Mode, Up/Down Capability One Four-channel 16-bit PWM Controller (PWMC) One Two-wire Interface (TWI) - Master, Multi-Master and Slave Mode Support, All Atmel(R) Two-wire EEPROMs and I2C compatible Devices Supported - General Call Supported in Slave Mode One 4-channel 10-bit Analog-to-Digital Converter, Four Channels Multiplexed with Digital I/Os SAM-BA(R) Boot Assistant - Default Boot Program - Interface with SAM-BA Graphic User Interface - In Application Programming Function (IAP) IEEE(R) 1149.1 JTAG Boundary Scan on All Digital Pins I/Os, including Four High-current Drive I/O lines, Up to 4 mA Each Power Supplies - Embedded 1.8V Regulator, Drawing up to 60 mA for the Core with Programmable Output Voltage - Single Supply 1.8V - 3.6V - Zero-power Power-on Reset and Brownout Detector, Fully Programmable Fully Static Operation: Up to 36 MHz at 85C Available in a 128-lead LQFP Green and a 144-ball LFBGA Green Package
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6409A-ATARM-30-Jun-08
AT91SAM7L-STK Rev. A Starter Kit User Guide
Board Description
3.2
AT91SAM7L64/128 Block Diagram
Figure 3-1. AT91SAM7L64/128 Block Diagram
TDI TDO TMS TCK JTAGSEL
JTAG SCAN
ICE
ARM7TDMI Processor
Charge Pump
CAPP1 CAPM1 CAPP2 CAPM2 VDDINLCD VDD3V6 VDDLCD VDDIO2
System Controller
TST FIQ PIO IRQ0-IRQ1 2 MHz RCOSC
LCD Voltage Regulator 1.8 V Voltage Regulator
AIC
VDDIO1 GND VDDOUT VDDCORE
PCK0-PCK2 CLKIN PLLRC XIN XOUT
Memory Controller PLL OSC
32k RCOSC
VDDIO2
PMC
Embedded Flash Controller Abort Status
SRAM
2 Kbytes( Back-up) 4 Kbytes (Core)
Address Decoder Misalignment Detection
VDDCORE
VDDIO1
BOD POR Supply Controller Peripheral Bridge
Flash
64/128 Kbytes
ERASE
VDDIO1 NRST
RSTB FWUP
Peripheral Data Controller 11 Channels VDDIO1
ROM (12 Kbytes)
Fast Flash Programming Interface
APB
PGMRDY PGMNVALID PGMNOE PGMCK PGMM0-PGMM3 PGMD0-PGMD15 PGMNCMD PGMEN0-PGMEN2
SAM-BA
RTC PIT WDT
DRXD DTXD PIO PWM0 PWM1 PWM2 PWM3 TCLK0 TCLK1 TCLK2 TIOA0 TIOB0 TIOA1 TIOB1 TIOA2 TIOB2
DBGU
PDC PDC
PWMC
Timer Counter TC0 TC1 TC2
PDC
PIOA (26 IOs) PIOB (24 IOs) PIOC (30 IOs)
TWI
PIO
TWD TWCK NPCS0 NPCS1 NPCS2 NPCS3 MISO MOSI SPCK ADTRG AD0 AD1 AD2 AD3 ADVREF
SEG00-SEG39 COM0-COM9
LCD Controller
RXD0 TXD0 SCK0 RTS0 CTS0 RXD1 TXD1 SCK1 RTS1 CTS1 DCD1 DSR1 DTR1 RI1 PDC
PDC PDC
SPI
USART0 PIO
PDC PDC
PDC PDC
ADC
USART1
PDC
AT91SAM7L-STK Rev. A Starter Kit User Guide
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6409A-ATARM-30-Jun-08
Board Description
3.3
Memory
6 Kbytes of Internal single-cycle access High-speed SRAM 64/128 Kbytes of Internal single-cycle access High-speed Flash
3.4
Clock Circuitry
32.768 KHz standard crystal for the oscillator
3.5
Reset Circuitry
Internal reset controller with a bi-directional reset pin External reset push button
3.6
Shut Down controller
Programmable shutdown and Wake-Up Wake-up push button.
3.7
Power Supply Circuitry
For dynamic power consumption, the AT91SAM7L64/128 consumes a maximum of 30 mA on VCC at full speed 36MHz On board 2 AAA batteries or 3V DC input power pad directly supplied to VCC
3.8
User Interface
Five user- input push buttons, four direction buttons and one ok button
3.9
Debug Interface
20-pin JTAG/ICE interface connector One Serial interface (DBGU COM Port) via RS-232 DB9 male socket
3.10
Expansion Slot
One ZIGBEE expansion connector for Atmel AT86RF230 adaptor All PIOC signals of the AT91SAM7L64/128 are routed to peripheral extension connector (J6). This allows the developer to add external hardware components or boards.
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AT91SAM7L-STK Rev. A Starter Kit User Guide
Board Description
3.11
PIO Usage
Table 3-1. PIO Controller A
I/O Line PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PA8 PA9 PA10 PA11 PA12 PA13 PA14 PA15 PA16 PA17 PA18 PA19 PA20 PA21 PA22 PA23 PA24 PA25 Peripheral A Peripheral B Peripheral Usage Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL COM0 COM1 COM2 COM3 COM4 COM5 SEG0 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 SEG16 SEG17 SEG18 SEG19 Powered by VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2
AT91SAM7L-STK Rev. A Starter Kit User Guide
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6409A-ATARM-30-Jun-08
Board Description
Table 3-2. PIO Controller B
I/O Line PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13 PB14 PB15 PB16 PB17 PB18 PB19 PB20 PB21 PB22 PB23 NPCS3 NPCS2 NPCS1 RTS1 RTS0 DTR1 PWM0 PWM1 PWM2 PWM3 NPCS1 PCK0 PCK1 NPCS3 Peripheral A Peripheral B Peripheral Usage Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL Segment LCD PANEL SEG20 SEG21 SEG22 SEG23 SEG24 SEG25 SEG26 SEG27 SEG28 SEG29 SEG30 SEG31 SEG32 SEG33 SEG34 SEG35 SEG36 SEG37 SEG38 SEG39 COM6 COM7 COM8 COM9 Powered by VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2 VDDIO2
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AT91SAM7L-STK Rev. A Starter Kit User Guide
Board Description
Table 3-3. PIO Controller C
I/O Line PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PC8 PC9 PC10 PC11 PC12 PC13 PC14 PC15 PC16 PC17 PC18 PC19 PC20 PC21 PC22 PC23 PC24 PC25 PC26 PC27 PC28 PC29 Peripheral A CTS1 DCD1 DTR1 DSR1 RI1 IRQ1 NPCS1 PWM0 PWM1 PWM2 TWD TWCK RXD0 TXD0 RTS0 CTS0 DRXD DTXD NPCS0 MISO MOSI SPCK NPCS3 PCK0 RXD1 TXD1 RTS0 NPCS2 SCK1 RTS1 Peripheral B PWM2 TIOA2 TIOB2 TCLK1 TCLK2 NPCS2 PCK2 TIOA0 TIOB0 SCK0 NPCS3 TCLK0 NPCS3 PCK0 ADTRG PWM3 NPCS1 NPCS2 PWM0 PWM1 PWM2 PWM3 TIOA1 TIOB1 PCK1 PCK2 FIQ IRQ0 PWM0 PWM1 ZIGBEE ZIGBEE ZIGBEE MISO MOSI SPCK MAX3318E MAX3318E MAX3318E VCC/VBAT MONITOR MAX3318E MAX3318E FORCEON INVALID READY ENABLE DRXD DTXD Peripheral Usage User's Input Buttons User's Input Buttons User's Input Buttons User's Input Buttons User's Input Buttons ZIGBEE ZIGBEE MAX3318E ZIGBEE ZIGBEE OK UP RIGHT DOWN LEFT IRQ1 NPCS1 FORCEOFF RSIN SLP_IR Powered by VDDIO1 VDDIO1 VDDIO1 VDDIO1 VDDIO1 VDDIO1 VDDIO1 VDDIO1 VDDIO1 VDDIO1 VDDIO1 VDDIO1 VDDIO1 VDDIO1 VDDIO1 VDDIO1 VDDIO1 VDDIO1 VDDIO1 VDDIO1 VDDIO1 VDDIO1 VDDIO1 VDDIO1 VDDIO1 VDDIO1 VDDIO1 VDDIO1 VDDIO1 VDDIO1
AT91SAM7L-STK Rev. A Starter Kit User Guide
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6409A-ATARM-30-Jun-08
Section 4 Configuration
4.1 Configuration Straps
Table 4-1 gives details of configuration straps on the AT91SAM7L-STK rev. A starter board and their default settings.
Table 4-1.
Designation J6 pins 39-40 J8 SD1 SD2 SD3 SD4 R20 TP1 TP2 TP3 TP4 TP5 TP6 TP7 TP8 TP9 TP10 Notes: Default Setting Opened Closed Opened 2-3 Closed 2-3 IN N.A N.A N.A N.A N.A N.A N.A N.A N.A N.A Feature Closed for internal flash erase(1) VCC jumper(2) Disables VDDIO2 to VDDLCD connection Selects VCC or VDD3V6 to VDDLCD Enables VDDOUT applying to VDDCORE Selects VDDINLCD input Enables the ICE NRST input RX TX CLKIN FWUP ADREF XOUT NRSTB VDDIO2 VDD3V6 VDDOUT
1. This jumper is used to erase and reinitialize the internal flash content and some of the NVM bits. 2. This jumper is provided for power consumption measurement. By default, it is closed. To use this feature, the user has to open the strap and insert an ammeter.
AT91SAM7L-STK Rev. A Starter Kit User Guide
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6409A-ATARM-30-Jun-08
Section 5 Schematics
This section contains the following schematics: Top Level Interfaces LCD, KBD Processor
AT91SAM7L-STK Rev. A Starter Kit User Guide
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6409A-ATARM-30-Jun-08
5
4
3
2
1
Interfaces
SHEET 2
D
D
PC[0..29]
PC[0..29]
C
C
Interfaces Processor AD[0..3] PA[0..25] PB[0..23] PC[0..29]
SHEET 4
AD[0..3] PA[0..25] PB[0..23] PC[0..29] ERASE
Processor
B
AD[0..3] PA[0..25] PB[0..23] PC[0..29]
LCD, KBD
SHEET 3
B
AD[0..3]
PA[0..25] PB[0..23] PC[0..29]
ERASE
LCD, KBD
A
A
A
REV
INIT EDIT MODIF.
PP
DES.
17MAR08
DATE
XXX XX-XXX-XX
VER. REV. DATE SHEET
AT91SAM7L-STK
Top level
SCALE
1/1
A
1 4
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
5
J1
4
3
2
PC[0..29]
1
J2 AAA
1
1
Pad
AAA
GND J3
D
1
1
Pad
VCC
VCC
U1
VCC
19
C1 100NF
VCC GND
C1+ C1C2+ C2INVALID
2 4 5 6 11 1 20 14
C2 100NF C3 100NF PC13 PC14 R4 NOT POPULATED R1 100K R2 100K R3 100K
SERIAL DEBUG PORT
GND
18
3 7
V+ V-
PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PC8 PC9 PC10 PC11 PC12 PC13 PC14 PC15 PC16 PC17 PC18 PC19 PC20 PC21 PC22 PC23 PC24 PC25 PC26 PC27 PC28 PC29
D
PC7 PC12
C4 100NF
C5 100NF
READY FORCEOFF
C
J4
1 6 2 7 3 8 4 9 5
TP1 TESTPOINT GND TX TP2 TESTPOINT
C
PC17
FORCEON
17 8
D1OUT D2OUT
D1IN D2IN
13 12
GND
GND
DTXD
11
10
D09P24A4GX00 R5 0R
RX
16 9
R1IN R2IN
R1OUT R2OUT
15 10
DRXD
PC16
GND
GND
MAX3318E
B
J5
ZIGBEE INTERFACE
Note: Pin 1 on Zigbee board RZ502 matches pin 2 on this connector
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
VCC R6 0R
B
R7 10K U2
VCC
Only for AT86RF230Rev.A connexion not required for Rev.B on
5 VCC Q GND 5 4 2
GND VCC U3
3 1
VCC VCC RSTN MISO SPCK PC8 PC21
D CP C
2
4
NC7SZ125P5X
PC19
VCC PC9 PC20 PC6 PC5 SLP_TR MOSI NPSC1 IRQ1
6
NC7SZ175P6X VCC
3 1
VCC GND C6 NOT POPULATED C7 NOT POPULATED
GND
GND
A
GND
A
A
REV
INIT EDIT MODIF.
PP
DES.
17MAR08
DATE
XXX XX-XXX-XX
VER. REV. DATE SHEET
AT91SAM7L-STK
Interfaces
SCALE
1/1
A
2 4
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
5
4
3
2
1
BP1 PC[0..29] PB[0..23] PA[0..25] 3-1437565-0 BP2 BP3 BP4 PC2 3-1437565-0 3-1437565-0 BP5 PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PA8 PA9 PA10 PA11 PA12 PA13 PA14 PA15 PA16 PA17 PA18 PA19 PA20 PA21 PA22 PA23 PA24 PA25 COM0 COM1 COM2 COM3 COM4 COM5 SEG0 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 SEG16 SEG17 SEG18 SEG19 PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13 PB14 PB15 PB16 PB17 PB18 PB19 PB20 PB21 PB22 PB23 AD3 AD2 AD1 AD0 SEG20 SEG21 SEG22 SEG23 SEG24 SEG25 SEG26 SEG27 SEG28 SEG29 SEG30 SEG31 SEG32 SEG33 SEG34 SEG35 SEG36 SEG37 SEG38 SEG39 COM6 COM7 COM8 COM9 PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PC8 PC9 PC10 PC11 PC12 PC13 PC14 PC15 PC16 PC17 PC18 PC19 PC20 PC21 PC22 PC23 PC24 PC25 PC26 PC27 PC28 PC29 OK UP RIGHT DOWN LEFT PC3 3-1437565-0 DOWN 3-1437565-0 PC4 LEFT RIGHT PC1 PC0 UP OK
D
D
VCC GND GND GND
C
NPCS3 NPCS2 NPCS1 RTS1 RTS0 DTR1 PWM0 PWM1 PWM2 PWM3 NPSC1/PCK1 PCK0/NPCS3
VCC/VBAT MONITOR
VCC
Q1 FDV304P 1
2
PC15
C
AD[0..3]
3
R8 10K AD3 R9 10K VCC
AD[0..3]
SEG10
SEG12
SEG14
SEG16
SEG18
SEG20
SEG22
SEG24
SEG26
SEG28
SEG30
SEG32
SEG34
SEG36
SEG38
COM4
COM3
COM2
COM1
COM0
SEG0
SEG2
SEG4
SEG6
SEG8
VCC
GND
GND R11 NOT POPULATED
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
SEG11
SEG13
SEG15
SEG17
SEG19
SEG21
SEG23
SEG25
SEG27
SEG29
SEG31
SEG33
SEG35
SEG37
SEG39
COM5
COM4
COM3
COM2
COM1
SEG1
SEG3
SEG5
SEG7
SEG9
26
R10 NOT POPULATED LCD1 LCD_GS08001AA PC1 PC3 PC5 PC7 PC9 PC11 PC13 PC15 PC17 PC19 PC21 PC23 PC25 PC27 PC29 AD1 AD3 VCC GND JS1 GND DCD1/TIOA2_WKUP1 DSR1/TCLK1_WKUP3 IRQ1/NPCS2_WKUP5 PWM0/TIOA0 PWM2/SCK0 TWCK/TCLK0_WKUP7 TXD0/PCK0_WKUP9 CTS0/PWM3_WKUP11 /DTXD/MPCS2 MISO/PWM1 SPCK/PWM3 PCK0/TIOB1 TXD1/PCK2 NPCS2/IRQ0_WKUP13 RTS1/PWM1_WKUP15
B
J6
B
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
PC0 PC2 PC4 PC6 PC8 PC10 PC12 PC14 PC16 PC18 PC20 PC22 PC24 PC26 PC28 AD0 AD2 ERASE ERASE CTS1/PWM2_WKUP0 DTR1/TIOB2_WKUP2 RI1/TCLK2_WKUP4 NPCS1/PCK2_WKUP6 PWM1/TIOB0 TWD/NPCS3 RXD0/NPCS3_WKUP8 RTS0/ADTRG_WKUP10 DRXD/NPCS1 NPCS0/PWM0 MOSI/PWM2 MPCS3/TIOA1 RXD1/PCK1 RTS0/FIQ_WKUP12 SCK1/PWM0_WKUP14
SEG11
SEG13
SEG15
SEG17
SEG19
SEG21
SEG23
SEG25
SEG27
SEG29
SEG31
SEG33
SEG35
SEG37
A
SEG39
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39
COM10
SEG10
SEG12
SEG14
SEG16
SEG18
SEG20
SEG22
SEG24
SEG26
SEG28
SEG30
SEG32
SEG34
SEG36
SEG38 24
10
11
12
13
14
15
16
17
18
19
20
21
22
23
COM5
COM6
COM7
COM8
COM9
SEG1
SEG3
SEG5
SEG7
SEG9
25
1
2
3
4
5
6
7
8
9
SEG40
COM6
COM7
COM8
COM9
SEG2
SEG4
SEG6
SEG8
A
A
REV
INIT EDIT MODIF.
PP
DES.
17MAR08
DATE
XXX XX-XXX-XX
VER. REV. DATE SHEET
AT91SAM7L-STK
LCD, KBD
SCALE
1/1
A
3 4
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
5
PB[0..23]
4
3
2
1
PC[0..29]
FORCE WAKE-UP
VCC
U4
87 88 89 90 91 92 93 94 95 96 97 98 99 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 77 78
TP3 TESTPOINT
PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PC8 PC9 PC10 PC11 PC12 PC13 PC14 PC15 PC16 PC17 PC18 PC19 PC20 PC21 PC22 PC23 PC24 PC25 PC26 PC27 PC28 PC29
AT91SAM7L128-AU
PA[0..25]
D
PC0/CTS1/PWM2_WKUP0 PC1/DCD1/TIOA2_WKUP1 PC2/DTR1/TIOB2_WKUP2 PC3/DSR1/TCLK1_WKUP3 PC4/RI1/TCLK2_WKUP4 PC5/IRQ1/NPCS2_WKUP5 PC6/NPCS1/PCK2_WKUP6 PC7/PWM0/TIOA0 PC8/PWM1/TIOB0 PC9/PWM2/SCK0 PC10/TWD/NPCS3 PC11/TWCK/TCLK0_WKUP7 PC12/RXD0/NPCS3_WKUP8 PC13/TXD0/PCK0_WKUP9 PC14/RTS0/ADTRG_WKUP10 PC15/CTS0/PWM3_WKUP11 PC16/DRXD/NPCS1 PC17/DTXD/MPCS2 PC18/NPCS0/PWM0 PC19/MISO/PWM1 PC20/MOSI/PWM2 PC21/SPCK/PWM3 PC22/MPCS3/TIOA1 PC23/PCK0/TIOB1 PC24/RXD1/PCK1 PC25/TXD1/PCK2 PC26/RTS0/FIQ_WKUP12 PC27/NPCS2/IRQ0_WKUP13 PC28/SCK1/PWM0_WKUP14 PC29/RTS1/PWM1_WKUP15
R12 100K R13 100K
FWKUP
BP6 3-1437565-0 GND TP4 TESTPOINT
C8 NOT POPULATED
GND
ICE INTERFACE
VCC
PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13 PB14 PB15 PB16 PB17 PB18 PB19 PB20 PB21 PB22 PB23
41 42 43 44 45 46 47 48 49 50 51 52 53 54 57 58 59 60 61 63 64 65 66 67
PB0_SEG20 PB1_SEG21 PB2_SEG22 PB3_SEG23 PB4_SEG24 PB5_SEG25 PB6_SEG26 PB7_SEG27 PB8_SEG28 PB9_SEG29 PB10_SEG30 PB11_SEG31 PB12/NPCS3_SEG32 PB13/NPCS2_SEG33 PB14/NPCS1_SEG34 PB15/RTS1_SEG35 PB16/RTS0_SEG36 PB17/DTR1_SEG37 PB18/PWM0_SEG38 PB19/PWM1_SEG39 PB20/PWM2_COM6 PB21/PWM3_COM7 PB22/NPSC1/PCK1_COM8 PB23/PCK0/NPCS3_COM9
VCC
PA0_COM0 PA1_COM1 PA2_COM2 PA3_COM3 PA4_COM4 PA5_COM5 PA6_SEG0 PA7_SEG1 PA8_SEG2 PA9_SEG3 PA10_SEG4 PA11_SEG5 PA12_SEG6 PA13_SEG7 PA14_SEG8 PA15_SEG9 PA16_SEG10 PA17_SEG11 PA18_SEG12 PA19_SEG13 PA20_SEG14 PA21_SEG15 PA22_SEG16 PA23_SEG17 PA24_SEG18 PA25_SEG19
3 4 5 6 7 8 9 10 11 12 13 16 17 18 19 20 21 22 23 24 25 26 27 29 30 31
PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PA8 PA9 PA10 PA11 PA12 PA13 PA14 PA15 PA16 PA17 PA18 PA19 PA20 PA21 PA22 PA23 PA24 PA25
D
VDDOUT
R14 180R TP5
C
J7
R15 100K
R16 100K
R17 100K
R18 100K
R19 NOT POPULATED
125
CLKIN
118 1 3 5 7 9 11 13 15 17 19
AT91SAM7L-LQFP128
FWUP ADVREF TDI TMS TCK TDO NRST AD3 AD2 AD1 AD0 69 70 71 72 73
AD3 AD2 AD1 AD0
C
C9 100NF TESTPOINT
2 4 6 8 10 12 14 16 18 20
JTAG_TDI JTAG_TMS JTAG_TCK JTAG_TDO JTAG_RST R20 0R C10 R22 10K CM415-32.768KDZFB-F XC1 TP6 TESTPOINT 32.768 kHz VCC NOT POPULATED R21
116 82 81 117 79
GND
83 121 122 128 127
JTAGSEL PLLRC PLLRCGND XOUT XIN/PGMCK TST NRSTB 1 126
NOT POPULATED VCC TP7 TESTPOINT R23 GND
AD[0..3]
GND
22NF C11 2.2NF
1
C12 18PF
2
C13 18PF
VDDINLCD
VDDOUT VDDCORE VDDCORE VDDCORE VDDCORE VDDCORE VDDCORE
C14 10NF
VDDIO1 VDDIO1 VDDIO1
VDDIO2 VDDIO2 VDDIO2
CAPM2 CAPP2 CAPM1 CAPP1
GND
ERASE
GNDPLL
VDDLCD VDD3V6
B
123
RESET NRSTB
BP7 3-1437565-0 ERASE
B
74 2 28 62 84 100 124
14 40 56 68 76 86 120
GND GND GND GND GND GND GND
75 85 119
33 34
35 36 37 38
39
15 32 55
80
ERASE C29 10F 6V3
C30 100NF
C15 220NF
C16 220NF C33
R24 10R
TP8 GND TESTPOINT
C25 100NF C26 100NF C20 100NF C2710F 6V3
C17 2.2F C18 100NF C22 100NF C31 100NF C19 100NF C23 100NF C24 100NF
C21 100NF C32 100NF C28 100NF
2
TP9 SD1 VCC TESTPOINT C34 10F 6V3
10F 6V3
1
3
SOLDER DROP 2 pins open
12
GND
1
SD2
2
SAM7L Current measurement
JS2
SOLDER DROP 3 pins VDDOUT
A
TP10 TESTPOINT
J8 SD3 VCC
A
1
12
2 3
SOLDER DROP 3 pins SD4 A
SOLDER DROP 2 pins closed
2
1
REV
INIT EDIT MODIF.
PP
DES.
17MAR08
DATE
XXX XX-XXX-XX
VER. REV. DATE SHEET
AT91SAM7L-STK
GND Processor
SCALE
1/1
A
4 4
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
Section 6 Errata
6.1 Q1 Footprint Incorrect
Transistor Q1 is incorrectly connected. The schematic is right but the PCB connections of pins S and D are swapped => the protection diode is polarized forward (permanent current flow across the bridge) and the MOS is not operating properly (non accurate battery level measurement). Problem Fix/Workaround Remove Q1 in order to avoid the parasitic 150 A battery drain. If battery measurement is really mandatory for some applications, Q1 has to be removed and soldered bottom up, taking care to apply the correct polarity. Additionally, a 100 K pull-up resistor is needed across gate and source.
6.2
MAX3318 Control Pull-ups
The default configuration of the MAX3318 is ON. This leads to extra power consumption discharging the batteries when the AT91SAM7L128 enters OFF mode (or does not even drive PC7 and PC12 to put the MAX3318 in OFF mode). Problem Fix/Workaround Remove R1, R2 and R3 and add a 10M pull-down resistor on PC7. This allows to Force OFF the MAX3318 when the AT91SAM7L128 enters OFF mode and to turn it on when the AT91SAM7L128 wakes up. The user can save power consumption by driving PC7 connected to the FORCEOFF pin of the MAX3318.
AT91SAM7L-STK Rev. A Starter Kit User Guide
6-1
6409A-ATARM-30-Jun-08
Section 7 Revision History
Doc Rev 6409A
Comments First issue.
Change Request Ref.
AT91SAM7L-STK Rev. A Starter Kit User Guide
7-1
6409A-ATARM-30-Jun-08
Headquarters
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Product Contact
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6409A-ATARM-30-Jun-08

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